Noninductive equalizing network

ABSTRACT

An equalizing network for correcting phase and amplitude distortions comprises three cascaded operational-amplifier stages, all with grounded noninverting inputs, the first two of them having capacitive feedback to operate as inverting integrators while the third one has a resistive feed-back to function as a summing inverter. The first stage receives on its inverting input, by way of identical resistors, the input voltage and the output voltage of the network and feeds the inverting input of the second stage through an adjustable resistor serving for selection of the frequency of maximum or minimum attenuation. The last-mentioned input also receives the input voltage and the inverted output voltage through respective branches of a potentiometer, serving for adjustment of the attenuation, whose slider is in series with a further adjustable resistor controlling the phase delay. The connection between the potentiometer extremities and the network terminals may include a reversing switch to change the sign of the attenuation.

United States Patent [191 Feistel July 3,1973

[ NONINDUCTIVE EQUALIZING NETWORK [73] As signee: Wandel u. Goltermann,Reutlingen,

Germany [22] Filed: Dec. 3, 1971 [21] Appl. No.: 204,583

[30] Foreign Application Priority Data Dec. 4, 1970 Germany P 20 59728.8

[52] U.S. CL... 330/85, 330/107, 330/151 OTHER PUBLICATIONS Salerno,Active Filters: Part 7 Analog Blocks Ensure Stable Design," Electronics,Feb. 17, 1969, pp. l00l05. Kerwin et al. Active RC Bandpass Filter withindependent Tuning and Selectivity Controls, IEEE Journal of SolidtateCircuits, April 1970, pp. 74, 75.

Primary Examiner-Roy Lake Assistant Examiner-James B. MullinsAttorney-Karl F. Ross [5 7 ABSTRACT An equalizing network for correctingphase and amplitude distortions comprises three cascadedoperationalamplifier stages, all with grounded noninverting inputs, thefirst two of them having capacitive feedback to operate as invertingintegrators while the third one has a resistive feed-back to function asa summing inverter. The first stage receives on its inverting input, byway of identical resistors, the input voltage and the output voltage ofthe network and feeds the inverting input of the second stage through anadjustable resistor serving for selection of the frequency of maximum orminimum attenuation. The last-mentioned input also receives the inputvoltage and the inverted output voltage through respective branches of apotentiometer, serving for adjustment of the attenuation, whose slideris in series with a further adjustable resistor controlling the phasedelay. The connection between the potentiometer extremities and thenetwork terminals may include a reversing switch to change the sign ofthe attenuation.

10 Claims, 7 Drawing Figures 1 NONINDUCTIVE EQUALIZING NETWORK Mypresent invention relates to an equalizing network designed to correctphase and/or amplitude distortion in a signaling system serving for thetransmission of a board frequency band.

ln my prior US. Pat. No. 3,568,101 I have disclosed a four-terminalnetwork of this general type essentially designed as an impedance bridgewith two adjoining arms constituting different winding sections of anautotransformer subdivided into two subsections with an adjustable turnratio determining the degree of attenuation to be introduced. Theremaining two arms of the bridge include respective resistors which arejointly adjustable to vary the phase shift, with maintenance of a fixedresistance ratio therebetween related to the aforementioned turn ratio.A resonant circuit in one of these latter arms is tunable for theselection ofa transmission frequency for which the attenuation reaches aselected maximum value (which could be either positive or negative).

Accurate selection of the maximum attenuation or damping factor requiresthe use of a properly calibrated inductance as one of the subsections ofthe autotransformer, this inductance being preferably variable indiscrete steps for greater precision. Such calibrated coils arerelatively expensive to produce; moreover, the insertion of several suchnetworks in tandem (e.g., within a transmission line to be linearized)requires the interposition of isolating amplifiers between thesenetworks.

In my copending application Ser. No. 178,182, filed Sept. 7, 1971, lhave disclosed a simplified network of this description which, whileoffering almost all the operational advantages of the system disclosedand claimed in my above-identified patent, avoids the need forcalibrated transformer windings within the network. In that system,however, an inductance is still required as part of a tunable circuitestablishing a resonance frequency f,,.

The general object of my present invention is to provide a furtherimprovement in such equalizing network completely eliminating the needfor any inductive component, thus allowing their realization byintegratedcircuit techniques.

A more particular object is to provide a network of this character usingfixed capacitors, all the necessary adjustments being carried out withthe aid of variable resistors. These adjustments are the selection ofthree separately variable parameters, i.e., a median frequency (f,,) orthe corresponding pulsatance (m the attenuation or damping factor (taassociated with that frequency, and the related phase delay or transittime (T These objects are realized, pursuant to the present invention,by the provision of three cascaded operational amplifiers insertedbetween the input and output terminals of the network, i.e., a pair ofintegrating stages and a nonintegrating summing stage. One input lead ofeach operational amplifier is joined to a common input and outputterminal of the network held at a fixed potential hereinafter referredto, for convenience, as ground. The other, live input lead of the first(integrating) amplifier is connected through a first and a secondresistor to the ungrounded input and output I terminals, respectively,of the network. The corresponding input lead of the third (summing)amplifier is connected through a third resistor to the output circuit ofthe second (integrating) amplifier and through a fourth resistor to theungrounded input terminal of the network. A fifth resistor is insertedbetween the output circuit of the first amplifier and the live(ungrounded) input lead of the second amplifier, this lead beingconnected to the ungrounded input and output terminals of the networkthrough a first and a second resistance path, respectively; the secondresistance path, feeding back energy from the network output, is ofpolarityinverting character by including an inverter or by beingconnected to an inverting output of the third amplifier. A controlcircuit, designed to .vary the magnitudes of the resistances of thesetwo paths in a correlated manner, may include a pair of ganged resistors(similar to those shown in my prior patent and application) or, moreadvantageously, a potentiometer common to both paths to avoid the needfor a mechanical linkage. A sixth resistor, common to both paths,enables selection of the delay 'T for the median frequency f, which inturn is determined by the magnitude of the preferably adjustable fifthresistor. The damping factor a, is selectable, independently of thedelay T with the aid of the common control circuit.

More particularly, the grounded input leads of the three amplifierstages are all connected to the noninverting inputs so that theseamplifiers operate as inverters.

The use of operational amplifiers in filter networks is known per se,e.g., from an article entitled Active Filters: Part 7, Analog BlocksEnsure Stable Design by Joseph Salerno, Electronics, Feb. 17, 1969,pages -105. Though one of the circuits shown in that article includesthree inverting operational amplifiers in cascade, the first two of thembeing connected as integrators while the third one serves as a summer,that system lacks the aforedescribed control means for jointly varyingthe magnitude of the resistances of the two paths leading back to themiddle amplifier from the input andoutput terminals of the network, suchcontrol means being essential for the purpose of adjusting the dampingfactor a, in accordance with the present invention. The system referredto operates only with positive attenuation and, for want of anadjustable resistor common to the two resistance paths, also does notallow any variation in the phase delay T The adjustable sixth resistorof my improved equalizing network, common to the feedback andfeedforward paths, may be connected to the slider of a potentiometer,forming part of the attenuation-adjusting control means, either directlyor through the intermediary of an inverting amplifier which in thatevent is also common to both paths. In order to realize substantialphase delays in such a case, another inverter is then inserted in thefeed-forward path. For rapid changeover between positive and. negativedamping factors, l may provide switch means for selectively reversingthe connections between the two potentiometer branches and therespective paths.

The above and other features of my invention will now be described ingreater detail with reference to the accompanying drawing in which:

FIG. 1 is acircuit diagram of an equalizing network embodying my presentinvention;

FIG. 2 is a diagram similar to HO. 1, showing a modification;

FIGS. 3 and 4 represent graphs of attenuation and phase shift in asystem according to FIG. 1 or 2, plotted over a range of operatingfrequencies;

FIGS. 5 and 6 are graphs illustrating the dependency of phase delay onattenuation in a damping network lacking the control means of FIGS. 1and 2; and

FIG. 7 is a graph similar to those of FIGS. 5 and 6 but relating to theoperation of the equalizing network shown in FIG. 2.

FIG. 1 illustrates an equalizing network with an active input terminal1, an active output terminal 2 and a pair of grounded terminals 1', 2'which may be interconnected by a common bus bar (not shown). Threeoperational amplifiers A,, A,, and A,,, have their noninverting inputstied to' the same grounded bus bar, the inverting input of amplifier A,being connected to input terminal 1 through a first resistor R, and tooutput terminal 2 through a second resistor R,,. A third resistor vR,,,is inserted between the output of amplifier A,, and

the ungrounded (inverting) input of amplifier A,,, the same input beingconnected through a fourth resistor R,, to terminal 1. An adjustablefifth resistor R,, lies between the output of amplifier A, and theungrounded input of amplifier A,,. The last-mentioned input is furtherconnected through an adjustable sixth resistor R,,, to the slider of apotentiometer 15 having two branches R, R" respectively inserted in afeedback path 7, ex-

tending from output terminal 2, and in' a feed-forward path 8, extendingfrom input terminal 1.

Feedback path 7 includes a further operational amplifier 10 in serieswith a resistor R,, whose magnitude equals that of a feedback resistorR,,, of that amplifier which therefore has a gain of -l. A similarfeedback resistor R,,,, associated with amplifiers A,,, has a magnitudeequaling that of resistors R,,, and R,,,. The feedback loops ofamplifiers A, and A,, contain a pair of capacitors C C whereby thesestages operate as integrators.

FIG. 2 shows a similar network with correspondingly designatedcomponents wherein, however, potentiometer is inserted in the feedbackpath 7 ahead of the inverting amplifier 10 which therefore, togetherwith adjustable resistor R,,,, lies in a circuit branch common to bothpaths 7 and 8. The two resistance branches R and R" of potentiometer 15are joined to respective arms 36', 36 of a reversing switch 36respectively connecting them, in the illustrated switch position, inpaths 7 and 8, thus in a manner analogous to that of FIG. 1. In order tocompensate for the polarity inversion introduced by amplifier 10 in thefeed-forward path 8 of FIG. 2, the latter includes a furtherinvertingamplifier 12 with a fixed series resistor R and a feedbackresistor R of like magnitude so as to have a gain of I. It will beapparent that a reversal of switch 36 connects potentiometer branches Rand R in paths 8 and 7, respectively.

The overall resistance of potentiometer 15 in the embodiment of FIG. 2is twice that of resistor R,,, whereby, in a position of zeroattenuation in which the slider engages the midpoint of thepotentiometer, R' R I The voltages appearing between input terminals 1,l' and output terminals 2, 2 have been designated U and U respectively.The relationship between these voltages can be expressed, in generalterms, by

(1 /11, 0 0 +a,0 (Zn/ 0 0,0 0, j

where a a 0 b and b are frequency-independent coefficients, 6 =jQ beingthe radius of the circle shown in FIG. 7 of my prior US. Pat. No.3,568,101; in accor dance with the symbols used in that prior patent, Qm/w, with m, 21rf, where f, is an arbitarily selected referencefrequency.

The positive or negative peak attenuation a occurring at a medianfrequency f, (which corresponds to a pulsatance w to, and an operatingvariable I) (I is given by the equation gel il il 2) The correspondingphase delay T can be expressed y this value generally deviating butlittle from the peak of the delay curve as will be apparent from FIG. 4discussed hereinafter.

In FIG. 1 the coefficients of equation (I) have been inserted inbrackets next to the components determining same. Thus, coefficients aa, and a are respectively determined by the magnitude of resistors R,,(R R,,) and R,,,; coefficients b and b depend on the values of resistorsR,, and (R' R,,,), respectively.

In the network illustrated in FIGS. 1 and 2 the coefficient a, ofequation (I) is l in view of R,,, R,,,, while a b, on account of R, R,,.The transfer function U /U can then be rewritten as follows:

VII

,1 1 1 w c RmR F VII 1 1 1 wrCQRIIIR F where From equation (2) we findThe near-maximum phase delay, from equation (3),

becomes Ta 2 V follows from equation (5) according to which, with R 1,

Thus, 0),, and therefore 0,, can be varied by adjusting R, and/or RAdjustment of resistor R, would, however, also require a concurrentadjustment of R in order to maintain the relationship a b hence, Iprefer to make only resistor R adjustable.

It will be apparent that, in the system of FIG. I, inverter may beomitted if feed-back path 7 originates at another output of amplifier Acarrying the voltage U2 In the system of FIG. 2, in which again a l anda b the magnitudes of coefficients a, and b are given by 1 VII IXI III rZ VI and l vu lx/ m r z vl The phase delay of the network of FIG. 2 canbe expressed by the formula The peak attenuation id, is againexclusively determined by the ratio RlR" in accordance with equations(2), (9) and (10). For the undamped condition a, 0, therefore, theslider of potentiometer l5 occupies a midposition in which R R".

Equation (1 I) also shows that with elimination of the inverter 12,which reverses the sign of one of the two potentiometer branches R, R",T is reduced to O in the midposition of the slider, with minimum phasedelays throughout the band of operating frequencies (cf. curve T' inFIG. 11 of my U.S. Pat. No. 3,568,101) so that the system operates as anall-pass network.

In FIGS. 3 and 4 I have indicated the variation of attenuation a anddelay T as a function of the relative frequency f/f 0/0,. Each of thesefunctions will be seen to approximate a Gaussian curve, the negativevalues of or having been shown in dotted lines.

To equalize the transmission characteristics of a communication channel,generally with the aid of several cascaded equalizing networks operatingin different frequency bands, the attenuation a of each network shouldfirst be reduced by 0 by centering the slider of potentiometer l5whereupon the individual phase delays may be adjusted (with the aid ofresistor R to compensate for the overall delay of the channel throughoutthe frequency range of interest. Since the attenuation is independent ofthe setting of resistor R its value does not change during thisadjustment. Upon the subsequent resetting of the several potentiometersto provide a uniform damping factor throughout the range, the selectedphase delay is modified only slightly in a system corresponding to myinvention.

If, in the system of FIG. 2, the adjustment of the attenuation a,expressed by equation (6) were carried out by varying only one of twoseparate resistors replacing the two potentiometer branches, e.g., aresistor equivalent to branch R", the delay T would vary with frequencyin the manner illustrated in FIG. 5, i.e., along a family of curvesapplying to different peak attenuations 01,. In that Figure the dampingfactor a, ranges, in increments of 0.1 neper, between +1 Np and l Np. Itwill be seen that the median delay T selected at 20 for 01 0, rangesbetween about 38 for a, +1 Np and about 13 for or -l Np.

If the separate resistors determining the coefficients a and b were socoupled as to maintain a constant difference b a the family of curvesshown in FIG. 6 would result. According to the latter figure, with T,again having the value 20 for a, 0, this value rises to about 25 forboth a, +1 Np and 01 1 Np.

'In the system shown in FIG. 1, in which R R" is constant, equation (7)shows that the delay T is even less dependent upon the selectedattenuation, i.e., upon the ratio R"/R. This dependency can be minimizedthrough the choice of a small enough value for R with correspondingreduction of T In the extreme case in which Ry] 0, a substantial delay Tcould still be realized through suitable choice of the overallpotentiometer resistance R R". Even with small values of R R" and alarge resistance R however, the dependency of the delay T, uponattenuation is at worst equal to that shown in FIG. 6.

In the system of FIG. 2 the constancy of the sum R' R" results in anattenuation-independent median delay T according to equation (11); thiscorresponds to a constancy of the difference l/b,) l/a,) in equation(3).

FIG. 7 illustrates this independence of the delay T, which for allpotentiometer settings retains its chosen value of 20. At the point Twhich does not exactly coincide with the peak of the curve T(Q/.Q,,),the curve has a slope S (FIG. 4) that is constant for all values of 01,.Different damping factors result only in minor shifting of the curveflanks, as seen in FIG. 7, with the area beneath the curve (shaded inFIG. 4) remaining constant.

The reversing switch 36 of FIG. 2, which evidently could also beincluded in the system of FIG. 1, may be used for rapid switchoversbetween positive and negative damping factors without changes in phasedelay.

It will be noted that the networks of FIGS. 1 and 2, like thosedisclosed in my copending application Ser. No. 178,182, have outputamplifiers enabling them to be connected directly to the input side of asimilar network without interposition of an active isolating stage.

I claim:

1. An equalizing network comprising;

an input terminal, an output terminal and a common terminal; first, asecond and a third operational amplifier connected in cascade betweensaid input and output terminals, said first and second amplifiers beingconnected as integrators, said third amplifier being connected as asummer, each of said amplifiers having an output circuit, a live inputlead and another input lead connected to said common terminal; firstresistor inserted between said input terminal and the live input lead ofsaid first amplifier;

a second resistor inserted between said output terminal and the liveinput lead of said first amplifier;

a third resistor inserted between the output circuit of said secondamplifier and the live input lead of said third amplifier;

a fourth resistor inserted between said input terminal and the liveinput lead of said third amplifier, the output circuit of the latterbeing connected to said output terminal;

a fifth resistor inserted between the output circuit of said firstamplifier and the live input lead of said second amplifier;

a noninverting first resistance path extending from said input terminalto the live input lead of said second amplifier;

a polarity-inverting second resistance path extending from said outputterminal to the live input lead of said second amplifier, saidresistance paths being providedwith control means for jointly varyingthe magnitudes of their respective resistances while holding the sum ofsaid magnitudes constant; and

an adjustable sixth resistor common to both said re-.

sistance paths.

2. A network as defined in claim 1 wherein said amamplifier is providedwith a feedback resistor of the same magnitude as said fourth resistor.

5. A network as defined in claim 2 wherein said second resistance pathincludes an inverting fourth operational amplifier in series with saidsixth resistor and provided with an inverting input connected to saidoutput terminal.

6. A network as defined in claim 5 wherein said control means comprisesa potentiometer with first and second branches respectively included insaid first and second resistance paths.

7. A network as defined in claim 6 wherein said fourth amplifier isinserted between said output terminal and the second branch of saidpotentiometer.

8. A network as defined in claim 7 wherein said potentiometer has aslider connected through said sixth resistor to the live input lead ofsaid second amplifier.

9. A network as defined in claim 6 wherein said potentiometer has aslider connected to the inverting input of said fourth amplifier, saidsecond branch being con-nected to said output terminal, furthercomprising an inverting fifth operational amplifier inserted betweensaid input terminal and said first branch.

10. A network as defined in claim 6, further comprising a reversingswitch connected to said potentiometer for interchanging the connectionof said branches in said first and second resistance paths.

1. An equalizing network comprising: an input terminal, an outputterminal and a common terminal; a first, a second and a thirdoperational amplifier connected in cascade between said input and outputterminals, said first and second amplifiers being connected asintegrators, said third amplifier being connected as a summer, each ofsaid amplifiers having an output circuit, a live input lead and anotherinput lead connected to said common terminal; a first resistor insertedbetween said input terminal and the live input lead of said firstamplifier; a second resistor inserted between said output terminal andthe live input lead of said first amplifier; a third resistor insertedbetween the output circuit of said second amplifier and the live inputlead of said third amplifier; a fourth resistor inserted between saidinput terminal and the live input lead of said third amplifier, theoutput circuit of the latter being connected to said output terminal; afifth resistor inserted between the output circuit of said firstamplifier and the live input lead of said second amplifier; anoninverting first resistance path extending from said input terminal tothe live input lead of said second amplifier; a polarity-invertingsecond resistance path extending from said output terminal to the liveinput lead of said second amplifier, said resistance paths beingprovided with control means for jointly varying the magnitudes of theirrespective resistances while holding the sum of said magnitudesconstant; and an adjustable sixth resistor common to both saidresistance paths.
 2. A network as defined in claim 1 wherein saidamplifiers all have inverting inputs connected to said live input leadsthereof.
 3. A network as defined in claim 2 wherein said first andsecond resistors are of the same magnitude.
 4. A network as defined inclaim 3 wherein said thiRd amplifier is provided with a feedbackresistor of the same magnitude as said fourth resistor.
 5. A network asdefined in claim 2 wherein said second resistance path includes aninverting fourth operational amplifier in series with said sixthresistor and provided with an inverting input connected to said outputterminal.
 6. A network as defined in claim 5 wherein said control meanscomprises a potentiometer with first and second branches respectivelyincluded in said first and second resistance paths.
 7. A network asdefined in claim 6 wherein said fourth amplifier is inserted betweensaid output terminal and the second branch of said potentiometer.
 8. Anetwork as defined in claim 7 wherein said potentiometer has a sliderconnected through said sixth resistor to the live input lead of saidsecond amplifier.
 9. A network as defined in claim 6 wherein saidpotentiometer has a slider connected to the inverting input of saidfourth amplifier, said second branch being connected to said outputterminal, further comprising an inverting fifth operational amplifierinserted between said input terminal and said first branch.
 10. Anetwork as defined in claim 6, further comprising a reversing switchconnected to said potentiometer for interchanging the connection of saidbranches in said first and second resistance paths.